Boolean AND with passive input
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| in the palette | on the schematic |
The block is an analogue of the boolean block "AND", with the allocation of the active (first) and the so-called "passive" (second) port. The result of the block operation depends on the sequence in time of the moments of occurrence of logical units at the inputs, namely:
- if the first one appeared at the first (active) input, and the logical unit at the second (passive) input appeared after the first one, then the output of the block becomes equal to 1;
- if the first one appeared at the second (passive) input, and the logical unit at the first input "came" after the second one, then the output of the block is not set to 1.
Inputs
- Input of the 1st event - the port of the first signal;
- Input of the 2nd event - the port of the second signal.
Outputs
- Output - the result of the operation.
Properties
none
Parameters
none
Example
Let's assemble two diagrams, in one of which (on the boolean AND block with a passive input) a signal is transmitted first to the active input, then to the passive one. In is the second diagram, first the signal comes to the passive input, then to the active one.
The upper part of the diagram allows you to get the logical unit at the output of the passive boolean AND, due to the fact that the unit is fed primarily to the active input.
The lower part does not change the value of the block output, since the signal is supplied primarily to the passive input.
The upper part of the diagram allows you to get the logical unit at the output of the passive boolean AND, due to the fact that the unit is fed primarily to the active input.
The lower part does not change the value of the block output, since the signal is supplied primarily to the passive input.