Set-priority RS-trigger

		`\| Vector \| C \| ST \|`
`в палитре`	`на схеме`	`\| Vector \| C \| ST \|`

The block implements the set-priority RS-trigger model, i.e. if the logical one level is present at the R and S inputs, then the output takes the logical one value:

where y(t) is the output signal of the block, y(t – Δt) is the value of the output signal at the previous time step of integration, x_S(t), x_R(t) is the first and second input signals of the block (from English Set and Reset).

Входные порты

S – the input port for setting the trigger;
R – the input port for resetting the trigger.

Выходные порты

out – trigger output port;
Yinv – the inverse output port (optionally added in the block properties).

Свойства

Initial conditions – initial values of the output logic signal;
Add inverse output – indicates the presence of an inverse output.

Параметры

none